System Verification Automation Engineer (RISC-V CPU)

Purpose

Our team develops test program generators for system-level verification of processors, processor clusters, and SoCs. We use LLVM compiler infrastructure to generate code snippets used to verify processor core pipeline, various instruction set extensions, memory coherency, and so on. We also perform regular massive runs of generated tests.

Responsibilities

• Develop and maintain various automation scripts used for building generated tests, running system-level tests in RTL simulation and on FPGAs, analyzing test coverage, and so on
• Collaborate with DevOps team to maintain and improve throughput of generated tests execution

Practical skills

• Work experience: 3+ years;
• Python (3.x), CMake, git, Jenkins, Docker, Kubernetes;
• Experience with Linux development environment.

Experience with any of the following would be a plus:

• RISC-V instruction set architecture;
• RTL hardware design and verification;
• Hardware simulation models;
• Software development for bare metal or real-time OS.

Theoretical knowledge

• QA and/or hardware verification processes;
• Distributed systems architecture.

We offer:

• Become a part of the global process of transformation of microelectronics and create the latest RISC-V CPU, SoC and IP;
• Hybrid or remote format: you can work in a comfortable loft-office in Moscow (Trekhgornaya Manufactory) or Saint Petersburg (Polustrovo), remotely from home, incl. from another city;
• Possibility to choose a convenient start and end of the working day;
• Competitive salary level (ready to appreciate your knowledge and experience) + performance bonuses;
• Training/certification by the company (according to the agreed plan);
• Ability to grow horizontally and vertically, and depending on results and interests to move between projects and teams;
• Voluntary medical insurance the start day.